In a data processing system, data may be received or transmitted via an input/output (I/O) interface. This may be an I/O controller interface to an off-chip data resource or a network interface controller (NIC) to a resource of a local or remote network.
When data is received from an I/O interface it is directed to a storage resource of the data processing system, such as a memory or cache. Cache Stashing is a mechanism to install data within a particular cache in a data processing system. Cache stashing ensures that data is located close to its point of use, thereby improving the system performance.
An example of an I/O interface is a standard Peripheral Component Interconnect Express (PCIe) serial bus interface. PCIe based systems make use of transaction layer packet (TLP) Processing Hints (TPH) to add steering tags on PCI write messages which can be used to identify a stash target for write data. This mechanism introduces strongly ordered write stashes (required by posted writes ordering rules of the PCIe standard) which need to be handled by a system interconnect. However, interconnects, such as a coherent mesh network, are typically un-ordered, since data may take any of a number of different routes through the interconnect. In addition, current data processing interconnects are either unable to stash strongly ordered write data into CPUs or they are not capable of doing it at sufficiently high performance (Generation 4 of the PCIe standard supports write bandwidths of up to 32 GBps, for example). Still further, current systems are unable to stash strongly ordered write data from independent PCIe masters at high performance without issues such as deadlocks.